This relates to solid-state image sensor arrays and, more specifically, to complementary metal-oxide semiconductor (CMOS) image sensor arrays that are illuminated from the back side or the front side of a corresponding image sensor substrate. The image sensor pixels have incorporated therein a mechanism to drain overflow charge away from the image sensor pixels, thereby preventing charge from spilling into neighboring pixels in the array when a particular pixel or a group of pixels is overexposed. The invention describes in detail a charge transferring gate structure resulting in an improved overflow charge control that is particularly suitable for small size pixels illuminated from the back side of the substrate. The new transfer gate structure allows introducing the signal dynamic range compression directly into the pixel.
Typical image sensors sense light by converting impinging photons into electrons (or holes) that are integrated (collected) in sensor pixels. Upon completion of each integration cycle, the collected charge is converted into voltage signals, which are supplied to corresponding output terminals associated with the image sensor. Typically, this charge-to-voltage conversion is performed directly within the pixels, and the resulting analog pixel voltage signals are transferred to the output terminals through various pixel addressing and scanning schemes. The analog pixel voltage signals can sometimes be converted on-chip to a digital equivalent before being conveyed off-chip. Each pixel includes a buffer amplifier (i.e., source follower) that drives output sensing lines that are connected to the pixels via respective addressing transistors.
After charge-to-voltage conversion is completed and after the resulting signals are transferred out from the pixels, the pixels are reset before a subsequent new charge is accumulated. In pixels that include floating diffusions (FD) serving as a charge detection node, this reset operation is accomplished by momentarily turning on a reset transistor that connects the floating diffusion node to a voltage reference (typically the pixel source follower current drain node) for draining (or removing) any charge transferred onto the floating diffusion node. However, removing charge from the floating diffusion node using the reset transistor generates thermal kTC-reset noise. This kTC reset noise is removed using correlated double sampling (CDS) signal processing techniques in order to achieve desired low noise performance. Typical CMOS image sensors that utilize CDS require three transistors (3T) or four transistors (4T) per pixel, one of which serves as a charge transferring transistor. It is possible to share some of the pixel circuit transistors among several photodiodes, which also reduces the pixel size.
It is typically necessary for image sensors to simultaneously satisfy three requirements. In particular, image sensors need to accumulate holes to reduce dark current, provide an efficient blooming control, and guarantee complete charge transfer from the photodiode when the transfer gate is turned fully on. These three requirements are not easily satisfied simultaneously, which typically results in some pixel performance sacrifice. Another problem is that once the pixel is designed and manufactured with a particular transfer gate length and doping levels, the blooming performance of the pixel is fixed and cannot be changed. This typically results in some sacrifice of the pixel charge well capacity that has to be built into the pixel to serve as a margin for effective anti-blooming operations.
It would therefore be desirable to be able to provide improved image sensor pixel designs.